Electrical Engineering Department Conducts Training on Layout of Operational Amplifier
The Electrical Engineering Department (EED) at Syed Babar Ali School of Science and Engineering (SBASSE), LUMS, held a specialised training session for Integrated Circuit (IC) Design focused on the layout of an operational amplifier in 180nm Bipolar CMOS & Deep-Trench (BCD) High Voltage Process. The training, conducted from June 21-25, 2021, was planned for the scientists and engineers of the National Electronics Complex of Pakistan (NECOP).
The training was conducted by Dr. Awais Bin Altaf, Assistant Professor at SBASSE and was attended by 10 NECOP participants. The training lasted five days, with eight hours per day dedicated to training focused on the layout design, design rule check, layout vs schematic , post-layout simulation, and final sign-off process for the chip fabrication (taepout). The trainees performed all these tasks in the Embedded Lab in EED using industry-standard Cadence and Mentor Graphics CAD tools for the IC design. This training will help bridge the gap between industry and academia and will lead to future joint collaborative efforts in the area of IC design.
The NECOP participants also engaged with the EED external relation committee and discussed mutual projects of interest during their visit. The training was concluded with a closing ceremony chaired by Dr. Abubakr Muhammad, Head of Department, EED, and Dr. Sabieh Anwar, Dean, SBASSE.